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| Semiconductor S3842P Current Mode PWM Controller Descriptions The S3842, high performance current mode controller, Provides the necessary features to off-line and DC-DC fixed frequency current control applications offering the designer a cost effective solution with minimal external components. Internally protection circuity includes built-in input and reference under-voltage lockout and current limiting with hysteresis. Also other characteristics of internal circuit provide improved line regulation, enhanced load response, trimmed oscillation for precise duty cycle control, a temperature compensated reference, high gain error amplifier, current sensing comparator and totempole output designed to source and sink high peak current from a capacitive load such as the gate of a power MOSFET. Features * Optimized for off-line control * Low start up and operating current * Pulse by pulse current limiting * Current mode operation to 500 * Under voltage lockout with 6V hysteresis * Internally trimmed bandgap reference about 5V * Enhanced load response characteristic * Automatic feed forward compensation Ordering Information Type NO. S3842P Marking S3842P Package Code DIP-8 Outline Dimensions unit : mm PIN Connections 1. Output / Compensation 2. Voltage feedback. Input 3. Current sense Input 4. Rt/Ct 5. GND 6. Output 7. Vcc 8. Vref KSI-L006-000 1 S3842P Absolute Maximum Ratings Characteristic Supply voltage Current Sense and Vfb Input Total Power Supply and Zener Current Output Sink of Source Current Error AMP Output Sink Current Operating Ambient Temperature Storage Temperature Range Power Dissipation at Ta 50C Ta=25C Symbol Vcc VIN ICC+ IZ Io Ieo Ta Tstg Pd Ratings 30 -0.3 to Vcc 30 1 10 0 to 70 -65 to 150 1 Unit V V mA A mA C C W note) All voltages are with respect to PIN5, and current are positive into the specified pin. PIN Description PIN NO 1 2 3 4 5 6 7 8 Function Compensation Voltage feedback Current sense Rt/Ct Ground Output VCC Vref Description Error amplifier output and is made available for loop compensation. Inverting input of error amplifier, normally connected to the switching power supply output through a resistor driver. A voltage proportional to inductor current is connected to this input. The PWM uses this information to terminate the output. The oscillator frequency and maximum output duty cycle are programmed by connecting resistor Rt to Vref and capacitor Ct to ground. This pin is the combined control circuitry and power ground. This output directly drives the gate of a power MOSFET. Peak current up to 1.0A are sourced and sinked by this pin. This pin is the positive supply of the control IC. This is the reference output. it provides charging current for capacitor Ct through resistor Rt. Block Diagram KSI-L006-000 2 S3842P Electrical Characteristics (Unless otherwise stated, these specifications apply for 0 Ta 70C; VCC =15V(Note.4), RL =10 , CL =3.3nF) Characteristic 1. Reference Section Output Voltage Line Regulation Load Regulation Temperature Stability Output Noise Voltage Long Term Stability Output Short Circuit Symbol Vref Vref Vref VT /VT Vn S ISC fSC f /V f /T V4 Test Condition Ta=25C, IO=1mA 12V VCC 25V 1mA IO 20mA (Note 1) 10Hz f 10KHz,Ta=25C(Note Min. 4.90 -30 47 - Typ. Max. 5.00 6 6 0.2 50 5 -100 52 0.05 5 1.7 5.10 20 25 0.4 -180 57 1.0 - Unit V mV mV mV/C uV mV mA KHz % % V 1) - Ta=125C, 1000Hrs (Note 1) 2. Oscillator Section Initial Accuracy Voltage Stability Temperature Stability Amplitude Ta=25C 12 Va 25V Tmin Ta Tmax (Note 1) VPIN4 Peak to Peak 3. Error Amp Section Input Voltage Input Bias Current Open Loop Voltage Gain Supply Voltage Rejection Output Sink Current Output Source Current VOUT High VOUT Low V2 Ib AVO1 SVR IO IO Vch Vc1 VPIN1=2.5V 2V VO 4V 12V Va 25V VPIN2=2.7V, VPIN1=1.1V VPIN2=2.3V, VPIN1=5V VPIN2=2.3V, VPIN2=2.7V, RL=15 to Ground RL=15 Pin8 2.42 65 60 2 -0.5 5 2.50 -0.3 90 70 6 -0.8 6 0.7 2.58 -2.0 1.1 V mA mA V V 4. Current Sense Section Gain Maximum Input Signal Supply Volt Rejection Input Bias Current GV V3 SVR Ib (Note 2 & 3) VPIN 1=5V (Note 2) 12 Va 25V (Note 2) 2.8 0.9 3.0 1.0 70 -2 3.2 1.1 -10 V/V V 5.Output Section Output Low Level VOl ISINK=20mA ISINK=200mA ISOURCE=20mA ISOURCE=200mA Ta=25C, Cl=1nF (Note 1) Ta=25C, Cl=1nF (Note 1) 13.0 12.0 0.1 1.5 13.5 13.5 50 50 0.4 2.2 150 150 V V V V ns ns Output High Level Rise time Fall time VOh tr tf KSI-L006-000 3 S3842P Electrical Characteristics(continued) Characteristic Start Threshold Min. Operation Voltage After Turn-On Symbol Vth VCC(min) Test Condition VPIN7 where VPIN8 4.9V VPIN7 where VPIN8 1V - Min. 14.5 8.5 Typ. Max. 16.0 10.0 17.5 11.5 Unit V V 6. Under-Voltage Lockout Section 7. PWM Section Maximum Duty Cycle DCmax Ist ICC VZ 93 97 100 ns 8. Total Standby Section Start-Up Current Operating Supply Current Zener Voltage VCC = 15V before turn on 0.4 11 36 0.7 20 mA mA V VPIN2= VPIN3= 0V ICC= 25mA NOTE: 1.Thes parameters, although guaranteed.are not 100% tested in production 2.Parameter measured at trip piont of latch with Vpin2=0 3.Gain defined as : A =VPIN1/VPIN3 ; 0 VPIN3 0.8V 4.Adjust VCC above the start threshold before setting at 15V Information in Using IC 1. Under voltage Lockout To prevent erratic output behavior which activating V cc 7 the power switch with extraneous leakage currents, O N /O F F C O M M A N D T O R ES ET O F IC during under voltage lockout. Output(pin6) should be shunted to ground with a bleeder resister. V o n -16V V o f f -10V Icc The Vcc comparator upper and lower threshold are 16V/10V. The large hysteresis and low start up currents makes it ideally suited in off-line converter application where efficient bootstrap start-up techniques are required. <17mA <1mA 10V 16V V cc KSI-L006-000 4 S3842P 2. Oscillator Waveforms and Maximum Duty Cycle The oscillator frequency is programmed by the values LARGE Rt SMALL Ct 8 Rt 4 Ct 5 selected for the timing components Rt and Ct. Ct is Vpin4 charged from 5V, Vref, through resistor Rt to approximately 2.8V and discharged to 1.2V by an internal current sink. During the discharge of Ct, the oscillator generates an internal blanking pulse and the center input NOR gate high. This makes output to be in a low state and control the amount of output dead time. INTERNAL CLOCK SMALL Rt LARGE Ct Vpin4 INTERNAL CLOCK 3. Error AMP Configuration 2.50V Error amp output(Pin1) is provided for external loop + 0.5m A Compensation and error amp can source or sink up to 0.5mA. The non-inverting input is internally biased at 2.5V and is not pinned out. The converter output voltage is typically V in Zt COMP 2 - divided down and monitored by the inverting input(pin2). Zf 1 4. Current Sense Circuit ERROR AMP 2R I R 1 R(V pin1 - 2V be) Ipeak = 3R x Rs R 3 C Rs 5 COMP CURRENT SENSE GND IV A normal operating conditions occurs when the power supply output is overloaded or if output voltage to 1.0V Therefore the maximum peak switch current is lpk(max)=1.0V/Rs, and under the normal operating conditions the KSI-L006-000 5 peak inductor current controlled by the voltage at pin1. S3842P 5. Shutdown Techniques 4.7K 8 V RE F 1 CO MP Shutdown of the S3842 can be accomplished by two methods; either raise pin3 above 1V or pull 3 4.7K S HUT DO W N T O CUR R E NT S E NS E R ES I S T O R 5.00 ISEN S E S HUT DO W N pin1 below a voltage two diodes drops above ground. Either causes the output of the PWM method comparator to be high (refer to block diagram). The PWM latch is reset dominant so that the output will remain low until the next clock cycle after the shutdown condition at pins 1 and/or 3 is removed. In one example, an externally latched shutdown may be accomplished by adding an SCR which turn off, allowing the SCR to reset. 6. Open Loop Test V REF 2N2222 4.7K 100K 1 COMP 2 ISENSE ADJUST 3 4 V in V REF 5 V cc 6 0.1uF 0.1uF 1K/1W OUTPUT RT V cc ERROR 1K AMP ADJUST 4.7K S3842 ISENSE RT/CT OUTPUT 7 8 GND GROUND High peak currents associated with capacitive leads necessitate careful grounding techniques. Timing and bypass capacitors should be connected close to Pin5 in a single point ground. The transistor and 5 potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to Pin3. 7. Slope Compensation V 0.1u F RE F A fraction of the oscillator ramp can be resistively RT 8 summed with the current sense signal to provide slope compensation for converters requiring duty cycle over 50%. Note that capacitor C, forms a R1 R2 I SEN SE R T /C T 4 CT filter with R2 to suppress the leading edge switch spikes. I SEN SE 3 C R SEN SE KSI-L006-000 6 S3842P Electrical Characteristic Curves OUTPUT DEAD-TIME vs. OSCILLATOR FREQUENCY 100 %DT PERCENT OUTPUT DEAD-TIME 50 20 10 5.0 200pF 2.0 1.0 10K 20K 50K 100K 200K 100pF V c c =15V Ta = 25o C 5.0n F R T TIMING RESISTOR (K) 80 50 500pF 5.0n F 100pF TIMING RESISTOR vs. OSCILLATOR FREQUENCY 2.0n F 1.0n F 20 8.0 5.0 2.0 Ct =10n F 500pF 200pF V c c =15V Ta = 25o C 20K 2.0n F 1.0n F CT=10n F 50K 100K 200K 500K 1.0M 500K 1.0M 0.8 10K fOSC OS CILLATOR FREQUENCY (KHz ) fOSC OS CILLATOR FREQUENCY (KHz ) Error Amplifier Open-Loop Frequency Response SATURATION VOLTAGE (V) VOLTAGE GAIN (dB) 80 60 40 20 AV 0 -180 -90 -135 0 PHASE ( o Output Saturation Characteristics 4 Vcc=15V Ta = 25o C 3 Ta=-55o C -45 2 ) 1 SOURCE SAT(Vcc-VOH) SINK SAT(VOL) 0 10 100 1K 10K 100K 1M 10M 0.1 0.2 0.3 0.4 0.5 0.7 1 2 3 4 5 7 10 FREQUENCY (Hz) OUTPUT CURRENT SOURCE OR SINK (A) KSI-L006-000 7 |
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